CSE370 Quiz 3 (7 May)
 
  1. Design a 4-bit adder that adds a 4-bit 2s complement number to a 4-bit sign/magnitude number and produces a 4-bit 2s complement result. Your circuit must use four 1-bit full adders as the basic building blocks, but you may add any other logic you wish. Do not worry about overflow.

    2.  

     

     

     

     

     

     

     

     

     

  2. You are given the basic sequential circuit consisting of two cross-coupled NAND gates. Which input values (A and B) cause the state of the circuit to be set (Q = 1, Q' = 0)? Does this circuit have an input condition that should not be used and if so, what is it? Explain why or why not in 1 sentence.


    3.  

     

     

     

Comments to: cse370-webmaster@cs.washington.edu (Last Update: )