CSE467: Advanced Logic Design

Carl Ebeling, Winter 2004

Syllabus

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We will be covering the following topics, but not necessarily in this order.

Review

• Combinational Logic
• Structured Logic Implementations
• Sequential Logic and Clocking methodologies
• Finite-State Machines

Implementation

• Electrical Realities
• Logic Families
• Practical Issues: Reading Data Books, Interfacing
• Programmable Logic: PALs and PLDs
• FPGA architectures

Computing Structures

• Control/Datapath model of computation
• Datapath organization
• Control logic
• Pipelining
• Scheduling and Retiming
• Sharing and time-multiplexing

System Components

• Read-mostly Memory Technologies (ROM, PROM, EPROM, EEPROM, Flash)
• Static and Dynamic Memories
• Memory Controllers and Timing Generation
• Special-Purpose Memory Devices
• Digital Communication
• Serial and Parallel Protocols
• Synchronous vs. Asynchronous Communication
• System Busses and Bus Interface Design
• Arbitration Schemes

Computer-Aided Design

• Hardware Description Languages: Verilog
• Two-level and Multi-level Logic Synthesis
• Technology-Independent Optimizations
• Technology Mapping
• Sequential Synthesis
• Underlying Data Structures and Algorithms
• Physical design: Placement and Routing
• Simulation

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ebeling@cs.washington.edu