CSE467: Advanced Logic Design

Carl Ebeling, Winter 1999

Homework 5

Distributed: Monday March 1 - Due Wednesday March 10

1. The 24L257 SRAM we are using is a 32Kx8 static RAM. Draw a schematic (by hand is fine) to show how 8 of these SRAMs can be used together to make a 128Kx16 memory.

2. Draw a schematic (by hand is fine) to show how 8 24L257 SRAMS can be used together to make a 512Kx4 memory.

3. Let's assume you are designing a processor with instructions that have two input operands and one output operand. This means that the processor needs to read two values from memory at a time, but needs to write only one value at a time. We call this a memory with two read ports. Draw a schematic (by hand is fine) to show how to implement a 8Kx16 memory like this using four of our 24L257 SRAM chips. Note that you don't need to read and write at the same time - you are either reading two values or writing one value at a time.

4. Design a 16Mx8 memory system using the 4Megx4 DRAM presented in class. The interface to this memory system is simple: A Read signal is asserted for one cycle to request a read, and a Write signal is asserted for one cycle to request a write. There is an address register which has the correct value when either read or write is asserted; there is an output data register which has the value to be written when write is asserted; and there is an input data register which the memory uses to store the data read from the memory.

   Draw schematic (by hand is OK) of your circuit and draw a state diagram for a memory controller for this memory, assuming that you have a 100MHz clock. This controller should generate the appropriate control signals for the memory chips and for the interface registers.

5. In the 22V10 PAL, the maximum number of product terms for any output is 16. Show how you can compute some functions with 32 product terms by using the output enable control terms. (Hint: Try computing the parity function with 6 inputs.) What condition must be satisfied by the product terms in such a solution? Can you extend this idea to parity over 7 bits?