CSE467: Advanced Logic Design

Carl Ebeling, Winter 1999

Syllabus

We will be covering the following topics, but not in this order. See the class schedule page for the approximate sequence of topics.

Review

Combinational Logic
Structured Logic Implementations
Sequential Logic
Finite-State Machines

Implementation

Electrical Realities
Logic Families
Practical Issues: Reading Data Books, Interfacing
Fixed Function Parts
Programmable Parts
PALs and PLDs
FPGAs

Computer-Aided Design

Hardware Description Languages (Verilog)
Compilation into Logic
Two-level and Multi-level Logic Synthesis
Technology-Independent Optimizations
Technology Mapping
Sequential Synthesis
Underlying Data Structures and Algorithms
Tools for Mapping to PLDs and FPGAs

System Components

Read-mostly Memory Technologies (ROM, PROM, EPROM, EEPROM, Flash)
Static and Dynamic Memories
Memory Controllers and Timing Generation
Special-Purpose Memory Devices
Digital Communication
Serial and Parallel Protocols
Synchronous vs. Asynchronous Communication
System Busses and Bus Interface Design
Arbitration Schemes

ebeling@cs.washington.edu