Lab components

Objective

Reading

Part 1

Part 2

Part 3

Part 4

Turnin

Objectives:

In this lab will you will learn the following: 

• VGA interfacing
• how to use the VGA interface to display an image on a monitor
• how to do simple animations using stored images
• Microcontroller interface
• how to control the display hardware using the microcontroller

You should organize your project files so that you have a copy of all the interesting designs you have completed in this class. That is, instead of just modifying a project to implement the next one, make a copy (software and hardware) in a new folder and modify that one instead.

Reading

This lab has no handouts. 

Part 1 -- The VGA Interface
 

The Xilinx project called vga is in the \\ifilesrv1\courses\cse477\Spring2000\lab3\ folder.  This project contains:

1. A VGA interface module
2. A dual-ported memory interface module
3. A module called PAN that displays a 64x64 window of the 256x128 image in memory

1.  The VGA interface needs a 24MHz clock, so first you need to change the clock to 24MHz.

For version 1.4 boards start "XESS Set Clock" from your Desktop.  Select "board type" to be XS40-010XL, LPT1 as the port, and appropriate divisor (4). It turns out that setting the clock only works with the OKI chip.

For version 1.2 boards you need to install the 24MHz oscillator onto the protoboard according to the following instructions:

The pinout of the oscillator will be available in lab.  The clock pin should be connected to pin 28 on the XESS board.  GND should be connected to pin 52 and VCC should be connected to pin 2.

For version 1.4 boards change the first line in vga.ucf file to read "NET PADCLK LOC=P13" since you're using the internal clock.

3.  Implement the design to create a bit file. To run the project, download an image in HEX file format (e.g. \\ifilesrv1\courses\cse477\Spring2000\lab3\lab3.hex) along with the Xilinx bit file using the xsload command.

4.  The pan module has a 3-bit control input that is connected to the parallel port data bits [3:1].  Look at the Verilog code for the PAN module to see how this control is used.  Reset is connected data bit 0.  Use the xsport command to set these bits - first reset the project, and then experiment with the pan controls.

Have your TA sign you off on Part 1.

Part 2 -- Blowing Up the Image

In this part, you will modify the project from part 1 slightly to change the display from 64x64 pixels to 128x128 pixels on the monitor. That is, you will display the same part of the image as in part 1, but you will display it doubled in size. Take some time to think about how to do this. Note that the curx, cury values are fixed point, with 7 bits to the left of the binary point and 4 bits to the right.

Have your TA sign you off on Part 2.

Part 3 -- Animation

Now you have a large enough image to do an interesting animation.  We will perform the animation by displaying 8 different images in order. 

1. Each image will be 64x64 and the 8 images will be stored consecutively.
2. We have an animation data file, lion.hex located in the lab3 folder, preformated for you.  There is also a .gif version available for viewing (use Netscape or IE to view the animation). 
3. Use the 3 PC parallel port data  pins that controlled panning in the previous part to control the speed and direction of the animation.

Part 4 -- Interfacing to the Microcontroller

Since the Xilinx chip uses the memory, for this part you need to use Atmel 8051 chip, the 8051 that has the 20K flash memory. Don't forget to put the J7 jumper in the right position for the Atmel chip (jumper set to "int").  

In Lab 2, you interfaced the accelerometer to the microcontroller.  In this part, you will interface your project from Part 4 to the microcontroller, replacing the PC port pins with microcontroller outputs to control the speed and direction of the animation.  Use tilt in one direction to control the direction and tilt in the other direction to control the speed of animation.

Don't forget that you have to enable the microcontroller (the Atmel part) by connecting the RST and XTAL signals in your project drawings. The RST signal can be connected to the PC_D0 signal which is toggled using the xsport command, or you can connect it to a switch for standalone operation.  The XTAL signal should be connected to your Xilinx clock signal.  The best way to do this is to use two buffers: use a BUFGS where the clock comes into the chip to drive both the XTAL pin to the microcontroller and a BUFG which supplies the clock to the Xilinx chip.  This way you reduce the clock skew between the microcontroller clock and the Xilinx clock.

Have your TA sign you off on Part 4.  Turn in your schematics and Verilog code for your modified project, as well as the C program for the microcontroller.

What to Turnin

Demonstrate all 4 parts of the lab.  Hand in the schematics and code for Parts 2 and 4. You should also be able to answer detailed questions about every part.

 Last Updated:
4/11/00