The current version of the Xbus Design is now in the directory
 
ifilesrc1:\courses\cse477\Xbus\

The xbusvga directory contains the Xilinx design, while the xbusc
directory contains the Keil C project.

This design is not optimized, so it runs well off the theoretical
limit of 500k/sec.  It runs about 30-40k/sec currently.

The interface provided in xbus.c is as follows:

XWrite(addr, data);
data = XRead(addr);

The Xilinx design contains a memory mapped register (address 0xffff)
that is used to control the panning of the vga screen.  The register
shares this address with the sram, so that a write to address 0xffff
affects both the register and sram.

This design did not work for us with a standard parallel cable.  The
data and status pins on the parallel cable needed to be electrically
isolated from the PC.  We did this by rewiring an old Xilinx Xact
Dongle.