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CSE
477: Digital Systems Design
(Spring 1999) |
Lab
3: Interfacing to a VGA Display
Objectives: In this lab will you will learn the following:
You should organize
your project files so that you have a copy of all the interesting designs
you have completed in this class. That is, instead of just modifying a
project to implement the next one, make a copy (software and hardware)
in a new folder and modify that one instead.
Reading This lab has 2 handouts:
Part
1 -- The VGA Interface
A pinout of the oscillator will be available in lab (look on the white board). The clock pin should be connected to pin 28 on the XESS board. GND should be connected to pin 52 and Vcc should be connected to pin 2.First make a copy of this project in your own directory and implement it to create a bit file. To run the project, first download an image in HEX file format (e.g. \\ifilesrv1\cse477\lab3\lab3.hex) along with the Xilinx bit file using the xsload command. The pan module has a 3-bit control input that is connected to the parallel port data bits [3:1]. Look at the Verilog code for the PAN module to see how this control is used. Reset is connected data bit 0. Use the xsport command to set these bits - first reset the project, and then experiment with the pan controls. Have your TA sign you off on Part 1. Part 2 -- Blowing Up the Image In this part, you will modify the project from part 1 slightly to change the display from 64x64 pixels to 128x128 pixels on the monitor. That is, you will display the same part of the image as in part 1, but you will display it doubled in size. Take some time to think about how to do this. Note that the curx, cury values are fixed point, with 7 bits to the left of the binary point and 4 bits to the right. Have your TA sign you off on Part 2. Part 3 -- Installing More Memory So far we have been using 32Kx8 memory which does not allow a very large image. In this part, you will replace the 32Kx8 memory with a 128Kx8 memory which will allow you to download a 512x256 image. First remove the existing 32Kx8 memory and install the new 128Kx8 memory. The 128Kx8 memory chip has four extra pins- refer to the datasheet. It needs to be placed in the socket so that pins 1,2,31,and 32 hang over the edge. Wires are soldered to these pins. The two extra address lines are pins 2 and 31. Pin 2 should be connected to pin 72 on the XESS board/Xilinx chip and pin 31 should be connected to pin 30 on the XESS board/Xilinx chip. You will have to add these pins to your schematic. Pin 72 is a "normal" pin (note that it is also connected to pin 75, but you can ignore this). Pin 30 is a special pin and you need to use the symbol called MD1 in the library. If you look on the second page of the schematic, you will see the MD0 and MD2 pins used to connect to two data bits of the parallel port - your MD1 pin should look like these. In particular, you do not specify a pin location either in the schematic or in the UCF file. The other difference is that you cannot put a register in the IOB for this pin. This means that you will add one address pin (72) to the address pins in the schematic, but connect the other address pin (30) by itself using a generic register, output buffer and output pad. Now change the project to use this larger memory and test that you have installed it correctly. To accomplish this, you will have to change the dual-ported memory interface along with the PAN module definition.
Xsload2 mouse.binAfter this you would load your project bit file. Have your TA sign
you off on Part 3. Turn in the schematics and Verilog code for your
modified project.
Part 4 -- Animation Now you have a large enough image to do an interesting animation. We will perform the animation by displaying 32 different images in order.
Part 5 -- Interfacing to the Microcontroller In Lab 2, you interfaced the accelerometer to the microcontroller. In this part, you will interface your project from Part 4 to the microcontroller, replacing the PC port pins with microcontroller outputs to control the speed and direction of the animation. Use tilt in one direction to control the direction and tilt in the other direction to control the speed of animation. Don't forget that you have to enable the microcontroller (the Atmel part) by connecting the RST and XTAL signals in your project drawings. The RST signal can be connected to the PC_D0 signal which is toggled using the xsport command, or you can connect it to a switch for standalone operation. The XTAL signal should be connected to your Xilinx clock signal. The best way to do this is to use two buffers: use a BUFGS where the clock comes into the chip to drive both the XTAL pin to the microcontroller and a BUFG which supplies the clock to the Xilinx chip. This way you reduce the clock skew between the microcontroller clock and the Xilinx clock. Have your TA sign you off on Part 5. Turn in your schematics and Verilog code for your modified project, as well as the C program for the microcontroller. What to Turnin Demonstrate all 5 parts of the lab. Hand in the schematics and code for Parts 3 and 5. You should also be able to answer detailed questions about every part. |
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