Course Calendar

CSE 370

Week	Monday		Wednesday		Friday
1 Lab 1	01/05	Introduction	01/07 HW1	Binary Number Systems	01/09	Boolean Algebra and theorems, gates
2 Lab 2	01/12	Logic Gates, Truth Tables and Canonical Forms	01/14 HW2	NAND/NOR conversion Boolean cubes Homework 1 Due	01/16	Karnaugh Maps
3 Lab 3	01/19	Holiday- No Class	01/21 HW3	Introduction to Verilog Homework 2 Due	01/23	Logic minimization, Multiplexers Sample Midterm 1
4 Lab 4	01/28	Demultiplexers, PLAs/PALs	01/28 HW4	ROMs, Multi-level logic Homework 3 Due	01/30	MIDTERM 1 Midterm Solutions
5 Lab 5	02/02	Timing, Hazards	02/04 HW5	Adders Homework 4 Due	02/06	Intro to Sequential Logic, State Diagrams
6 Lab 6	02/09	Flip-flops and latches	02/11 HW6	Registers and Counters	02/13	Sequential Verilog Homework 5 Due
7 Lab 7	02/16	Holiday- No Class	02/18	Counter FSM, Timing Sample Midterm 2 Sample Midterm 2 Solutions	02/20	Finite State Machine Design Homework 6 Due
8 Lab 8	02/23 HW7	Moore and Mealy FSM Design	02/25	MIDTERM 2 Midterm Solutions	02/27	FSM Design Example: Ant Brain
9 Lab 9	03/02	State Matching for Minimization	03/04 HW8	State Minimization Homework 7 Due	03/06	State Encoding & Partitioning
10	03/09	Encoding/Partitioning Examples	03/11	Other Optimization, Tristate and Computer Organization Homework 8 Due	03/13 last class	Review Ant Extra Credit HW Due
11		Review Session EEB 037 4:30-6	03/18	FINAL EXAM Wednesday, MARCH 18, 2009 2:30-4:20 EEB 037