CSE 567: Principles of Digital Systems Design

Carl Ebeling, Fall 1998

Welcome to the 567 Home Page


Staying in touch:

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Course Information

Staff:

Lecture notes

  1. Overview
  2. Combinational Logic: Part I
  3. Project Overview: Image Compression
  4. Combinational Logic: Part II
  5. Verilog for combinational logic
  6. Sequential Circuits: Part I
  7. Verilog for sequential circuits
  8. Sequential Circuits: Part II
  9. FPGAs: Part I
  10. FPGAs: Part II
  11. HDL Synthesis
  12. Multi-level Logic Synthesis
  13. CMOS I
  14. CMOS II
  15. Miscellanea

Homework Assignments

Project

Course computing

A list of Research Suns being made available for this course can be found here.

Remember that these machines are primarily intended for use by researchers, and that machines may be added to or withdrawn from this list throughout the quarter, depending on the research demands placed on them. So please check this list often during the quarter.

Please try to distribute the load across these machines by first checking the load on several machines when you begin each session. The command "rsh host uptime" will be useful, once you've set up your .rhost files appropriately.

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