CSE 590g, Architecture Lunch

CSE 590g - Architecture Lunch


Course organizer:
Jean-Loup Baer
Meeting time:
Tuesdays, 12:30pm to 1:20pm, in MOR 226

CSE590G, aka "architecture lunch", will continue this quarter with almost the same format as previous years, i.e., selection of papers to be discussed at the beginning of the quarter, distribution on week n of the paper to be read during the week and discussed at week (n+1). There might be a few formal presentations of work in progress by esteemed members of the "lunch". Mostly we'll have (hopefully heated) discussions on papers from the literature.

The only difference between this quarter and previous quarters is that we'll start by reading the position papers from participants of a recent NSF Workshop on Critical issues in Computer Architecture Research. You can get a copy here

Reading these positions papers will lead us to one or more themes of papers to read this quarter.

With many thanks to Ruth Anderson, Molly Brown, Ori Gershony, and Matthai Philipose a tabular summary of the Gurus positions can be found here

For those of you who are new, our usual format is for one of the students to lead the discussion of the papers, either informally or with slides. Credit for the course is variable: 2 credits if you present, 1 if you just read.

The first meeting (organization meeting) will be Tuesday October 1 at 12:30 in MOR 226

On Tuesday Oct 22, we will read:

Value locality and Load value prediction by Lipasti, Wilkerson and Shen, ASPLOS VII pp 138-147.

All ASPLOS-VII papers are on line. Follow the links from:
ASPLOS-advance program

I have put a short bibliography of PIM (processor in memory) on line. I'd appreciate volunteers for the Saulsbury, Burger and M-machine papers.

On Tuesday Oct 29, we'll read

Ashley Saulsbury, Fong Pong, and Andreas Nowatzyk "Missing the Memory Wall: The Case for Processor/Memory Integration" ISCA 1996 pp 90-101

On Tuesday Nov 5, we'll read

M.Fillo, S.Keckler, W.Dally et al. "The M-machine multicomputer" Micro 28 1995 (available on the net: follow the M-machine link. )

On Tuesday Nov 12, we'll read

Doug Burger, Stefanos Kaxiras, and James R. Goodman "DataScalar Architectures and the SPSD Execution Model" University of Wisconsin-Madison Computer Sciences Department Technical Report 1317, July 1996. available on the net

On Tuesday Nov 19 (cancelled) reported to Tuesday Nov 26, we'll read

"Intelligent RAM (IRAM): Chips that remember and compute" by Patterson, Anderson, Cardwell, Fromm, Keeton, Kozyrakis, Thomas and Yelick. The paper is available here
We are fortunate that one of the authors, Prof. Tom Anderson, will present the paper.

On Tuesday Dec 3 we'll read

"Studies of Windows NT Performance using Dynamic Execution Traces" by Perl and Sites, OSDI 96.

On Tuesday Dec 10 we'll read

"Instruction prefetching of system codes with layout optimized for reduced cache misses" by Xia and Torrellas in ISCA96.

You can also get the paper from the net (8th paper down the list).

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baer@cs.washington.edu