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University of Washington Department of Computer Science  Engineering 

CSE 590cc: Configurable Computing Seminar
Winter, 2004
Experiments with RIL

Tuesday 1:30-2:20   Allen 203 (Note change)

Many research groups, including ours, have proposed reconfigurable architectures that are specialized for computing. These reconfigurable components have been proposed for platforms that also have processors and ASIC components.  A key problem is figuring out the best way to program and compile to these highly parallel architectures.   RIL (as in "RIL Deal") is a language that we've proposed for programming parallel reconfigurable architectures.  RIL has features for taking advantage of both task-level and fine-grained parallelism. This quarter we intend to experiment with RIL and find out whether it is sufficiently expressive and provides the right level of abstraction.
The first couple weeks will focus on the architecture model and the RIL language definition.  Participants will then use RIL to program a number of common applications from the embedded world.  They will present the results along with a critique of the language and suggestions for improvements. We will also read papers on a number of research and commercial platforms that have been proposed and evaluate RIL as a possible language for programming the components on these platforms.

RIL Manual

RIL Compiler Files (updated 1/27/2004)

This ZIP file contains the compiler and supporting files needed to use RIL.  Note that we now recommend Visual C++ over Eclipse since it works better with RIL.

Calendar

Jan. 13 – Intro and overview of RIL language and computation model

Jan. 20 – FIR filter 1 & 2 examples.

Jan. 27 – We will design simple matrix multiply from scratch, then try out the tiled version.

Feb. 3 –   Finish tiled matrix multiply.  Consider DCT.


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