Chris Diorio: Publications

Refereed journal papers

Refereed conference papers

Invited publications

Adaptive CMOS: From biological inspiration to systems-on-a-chip
Chris Diorio, David Hsu, and Miguel Figueroa
Proceedings of the IEEE, vol. 90, no. 3, pp. 345–357, 2002.

Adaptation of current signals with floating-gate circuits
Alberto Pesavento, Tim Horiuchi, Chris Diorio, and Christof Koch
Analog Integrated Circuits and Signal Processing, vol. 30, no. 2, pp. 137–147, 2002.

A mixed-signal approach to high-performance, low-power linear filters
Miguel Figueroa, David Hsu, and Chris Diorio
IEEE Journal of  Solid-State Circuits, vol. 36, no. 5, pp. 816–822, 2001.

An autozeroing floating-gate amplifier
Paul Hasler, Bradley A. Minch, and Chris Diorio
IEEE Transactions on Circuits and Systems II, vol. 48, no. 1, pp. 74–82, 2001.

Multiple-input translinear element networks
Bradley A. Minch, Paul Hasler, and Chris Diorio
IEEE Transactions on Circuits and Systems II, vol. 48, no. 1, pp. 20–28, 2001.

A p-channel MOS synapse transistor with self-convergent memory writes
Chris Diorio
IEEE Transactions on Electron Devices, vol. 47, no. 2, pp. 464–472, 2000.
(compressed postscript—zip, 611kB)

A low-noise, GaAs/AlGaAs, microwave frequency-synthesizer IC
C. Diorio, T. Humes, H. Notthoff, G. Chao, A. Lai, J. Hyde, M. Kintis, and A. Oki
IEEE Journal of  Solid-State Circuits, vol. 33, no. 9, pp. 1306–1312, 1998.
(compressed postscript—zip, 742kB). Also available in pdf format.

Impact ionization and hot-electron injection derived consistently from Boltzmann transport
Paul Hasler, Andreas G. Andreou, Chris Diorio,  Bradley A. Minch, and Carver Mead
VLSI Design, vol. 8, no. 1–4, pp. 455–461, 1998.
(compressed postscript—zip, 135kB)
(link to Paul Hasler's home page)

A floating-gate MOS learning array with locally computed weight updates
Chris Diorio, Paul Hasler, Bradley A. Minch, and Carver Mead
IEEE Transactions on Electron Devices, vol. 44, no. 12, pp. 2281–2289, 1997.
(compressed postscript—zip, 245kB)

A complementary pair of four-terminal silicon synapses
Chris Diorio, Paul Hasler, Bradley A. Minch, and Carver Mead
Analog Integrated Circuits and Signal Processing, vol. 13, no. 1/2, pp. 153–166, 1997.
(compressed postscript—zip, 310kB)

A single-transistor silicon synapse
Chris Diorio, Paul Hasler, Bradley A. Minch, and Carver Mead
IEEE Transactions on Electron Devices, vol. 43, no. 11, pp. 1972–1980, 1996.
(compressed postscript—zip, 180kB)

Translinear circuits using subthreshold floating-gate MOS transistors
Bradley A. Minch, Chris Diorio, Paul Hasler, and Carver Mead
Analog Integrated Circuits and Signal Processing, vol. 9, no. 2, pp.167–179, 1996.
(compressed postscript—zip, 245kB)
(link to Brad Minch's home page)

A Miniature Implantable Computer for Functional Electrical Stimulation and Recording of Neuromuscular Activity
J. Mavoori, B. Millard, J. Longnion, T. Daniel, C. Diorio
Session: Functional Electrical Stimulators and Related Sensing Techniques
IEEE BioCAS 2004, Singapore. Accepted for presentation, October 2004

An Implantable Brain-Computer Interface for Primates
A. Jackson, J. Mavoori, C. Diorio, and E.E. Fetz
Poster session: Brain/Machine Interface: Neural Prostheses I
Society for Neuroscience, San Diego, 2004

Timing Correction and Optimization with Adaptive Delay Sequential Elements
Kambiz Rahimi and Chris Diorio
Proceedings IEEE Design Automation and Test in Europe (DATE)
Paris, 2004

A floating-gate trimmed, 14-bit, 250 Ms/s digital-to-analog converter in standard 0.25µm CMOS
J. Hyde, T. Humes, C. Diorio, M. Thomas, and M. Figueroa
Proceedings of the 2002 Symposium on VLSI Circuits
Honolulu, HI, pp. 328–331, 2002

A simulation model for floating-gate MOS synapse transistors
Kambiz Rahimi, Chris Diorio, Cecilia Hernandez, and M. Dean Brockhausen
Proceedings of the 2002 IEEE International Symposium on Circuits and Systems
Phoenix, AZ, vol. 2, pp. 532–535, 2002.

A silicon primitive for competitive learning
David Hsu, Miguel Figueroa, and Chris Diorio
in T. K. Leen, T. Dietterich, and V. Tresp (eds.), Advances in Neural Information Processing Systems 13
Cambridge, MA: The MIT Press, pp. 713–719, 2001.

A floating-gate trimmable high-resolution DAC in standard 0.25µm CMOS
Miguel Figueroa, John Hyde, Todd Humes, and Chris Diorio
Proceedings of the 2001 Nonvolatile Semiconductor Memory Workshop
Monterey, CA, pp. 46–47, 2001.

Hidden-articulator Markov models: Performance improvements and robustness to noise
Matthew Richardson, Jeff Bilmes, and Chris Diorio
Proceedings of the Sixth International Conference on Spoken Language Processing
Beijing, China, vol. 3, pp. 131–134, 2000.

Hidden-articulator Markov models for speech recognition
Matthew Richardson, Jeff Bilmes, and Chris Diorio
Proceedings of the 2000 ISCA Workshop on Automatic Speech Recognition: Challenges for the New Millennium
Paris, France, pp. 133–139, 2000.

A 200MHz, 3mW, 16-tap mixed-signal FIR filter
Miguel Figueroa and Chris Diorio
Proceedings of the 2000 Symposium on VLSI Circuits
Honolulu, HI, pp. 214–215, 2000.
(compressed postscript—zip, 663kB)

A silicon primitive for competitive learning
David Hsu, Miguel Figueroa, and Chris Diorio
Proceedings of the Fourth International Conference on Cognitive and Neural Systems
Boston, MA, May 25–27, 2000.
(compressed postscript—zip, 50kB)

An FPGA-based array processor for an ionospheric-imaging radar
Tim Tuan, Miguel Figueroa, F. Lind, C. Zhou, Chris Diorio, and John D. Sahr
Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Napa, CA, pp. 313–314, 2000.

Synthesis of multiple-input translinear element networks
Bradley A. Minch, Paul Hasler, and Chris Diorio
Proceedings of the 1999 IEEE International Symposium on Circuits and Systems
Orlando, FL, vol. 2, pp. 236–239, 1999.
(89kB, pdf)
(link to Brad Minch's home page)

Adaptation of current signals with floating-gate circuits
Alberto Pesavento, Timothy Horiuchi, Chris Diorio, and Christof Koch
Proceedings of the 7th International Conference on Microelectronics for Neural, Fuzzy, and Bio-Inspired Systems (MicroNeuro99)
Granada, Spain, pp. 128–134, 1999.
(compressed postscript—zip, 97kB)
(link to Alberto Pesavento's home page)

Adaptive circuits using pFET floating-gate devices
Paul Hasler, Bradley A. Minch, and Chris Diorio
Proceedings of the 20^th Anniversary Conference on Advanced Research in VLSI (ARVLSI)
Atlanta, GA, pp. 215–229, 1999.
(compressed postscript—zip, 396kB)
(link to Paul Hasler's home page)

Realtime processor for estimating range-Doppler profiles of E-region irregularities with passive bistatic radar
C. Zhou, F. D. Lind,  Tim Tuan, Chris Diorio, and John D. Sahr
A poster presented at the 1999 American Geophysical Union
San Francisco, CA, 1999.

Floating-gate devices: They are not just for digital memories any more
Paul Hasler, Bradley A. Minch, and Chris Diorio
Proceedings of the 1999 IEEE International Symposium on Circuits and Systems
Orlando, FL, vol. 2, pp. 388–391, 1999.

A four-quadrant floating-gate synapse
Paul Hasler, Chris Diorio, and Bradley A. Minch
Proceedings of the 1998 IEEE International Symposium on Circuits and Systems
Monterey, CA, vol. 3, pp. 29–32, 1998.
(391kB, pdf)
(link to Paul Hasler's home page)

Continuous-time feedback in floating-gate MOS circuits
Paul Hasler, Chris Diorio, and Bradley A. Minch
Proceedings of the 1998 IEEE International Symposium on Circuits and Systems
Monterey, CA, vol. 3, pp. 90–93, 1998.
(157kB, pdf)
(link to Paul Hasler's home page)

The multiple-input translinear element: A versatile circuit element
Bradley A. Minch, Paul Hasler, and Chris Diorio
Proceedings of the 1998 IEEE International Symposium on Circuits and Systems
Monterey, CA, vol. 1, pp. 527–530, 1998.
(162kB, pdf)
(link to Brad Minch's home page)

Multiple-input translinear element networks
Bradley A. Minch, Paul Hasler, and Chris Diorio
Proceedings of the 1998 IEEE International Symposium on Circuits and Systems
Monterey, CA, vol. 1, pp. 88–91, 1998.
(135kB, pdf)
(link to Brad Minch's home page)

An autozeroing floating-gate bandpass filter
Paul Hasler, Bradley A. Minch, and Chris Diorio
Proceedings of the 1998 IEEE International Symposium on Circuits and Systems
Monterey, CA, vol. 1, pp. 131–134, 1998.
(178kB, pdf)
(link to Paul Hasler's home page)

An autozeroing floating-gate second-order section
Paul Hasler, Theron Stanford, Bradley A. Minch, and Chris Diorio
Proceedings of the 1998 IEEE International Symposium on Circuits and Systems
Monterey, CA, vol. 2, pp. 351–354, 1998.
(172kB, pdf)
(link to Paul Hasler's home page)

A 5.5 GHz fractional frequency-synthesizer IC
Chris Diorio, Todd Humes, Hans Notthoff, Gregory Chao, Alex Lai, John Hyde, Mark Kintis, and Aaron Oki
Technical Digest, 1997 IEEE GaAs IC Symposium
Anaheim, CA, pp. 248–251, 1997.
(compressed postscript—zip, 569kB)

Impact ionization and hot-electron injection derived consistently from Boltzmann transport
Paul Hasler, Andreas G. Andreou, Chris Diorio,  Bradley A. Minch, and Carver Mead
Proceedings of the Fifth International Workshop on Computational Electronics
Notre Dame, IN, May 28–30, 1997.
(compressed postscript—zip, 135kB)
(link to Paul Hasler's home page)

An autozeroing amplifier using pFET hot-electron injection
Paul Hasler, Bradley A. Minch, Chris Diorio, and Carver Mead
Proceedings of the 1996 International Symposium on Circuits and Systems
Atlanta, GA, vol. 1, pp. 325–328, 1996.
(compressed postscript—zip, 57kB)
(link to Paul Hasler's home page)

The matching of small capacitors for analog VLSI
Bradley A. Minch, Chris Diorio, Paul Hasler, and Carver Mead
Proceedings of the 1996 International Symposium on Circuits and Systems
Atlanta, GA, vol. 1, pp. 239–241, 1996.
(compressed postscript—zip, 61kB)
(link to Brad Minch's home page)

A high-resolution nonvolatile analog memory cell
Chris Diorio, Sunit Mahajan, Paul Hasler, Bradley A. Minch, and Carver Mead
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems
Seattle, WA, vol. 3, pp. 2233–2236, 1995.
(compressed postscript—zip, 52kB)

Single transistor learning synapses with long term storage
Paul Hasler, Chris Dioro, Bradley A. Minch, and Carver Mead
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems
Seattle, WA, vol. 3, pp. 1660–1663, 1995.
(compressed postscript—zip, 63kB)
(link to Paul Hasler's home page)

A nMOS soft-maximum current mirror
Bradley A. Minch, Chris Diorio, Paul Hasler, and Carver Mead
Proceedings of the 1995 International Symposium on Circuits and Systems
Seattle, WA, vol. 3, pp. 2249–2252, 1995.
(compressed postscript—zip, 45kB)
(link to Brad Minch's home page)

A silicon axon
Bradley A. Minch, Paul Hasler, Chris Diorio, and Carver Mead
in Gerald Tesauro, David S. Touretzky, and Todd K. Leen (eds.), Advances in Neural Information Processing Systems 7
Cambridge, MA: The MIT Press, pp. 739–746, 1995.
(compressed postscript—zip, 100kB)
(link to Brad Minch's home page)

Single transistor learning synapses
Paul Hasler, Chris Dioro, Bradley A. Minch, and Carver Mead
in Gerald Tesauro, David S. Touretzky, and Todd K. Leen (eds.), Advances in Neural Information Processing Systems 7
Cambridge, MA: The MIT Press, pp. 817–824, 1995.
(compressed postscript—zip, 65kB)
(link to Paul Hasler's home page)