Code Scheduling

Balanced Scheduling:

• Improving Balanced Scheduling with Compiler Optimizations that Increase Instruction-Level Parallelism, J.L. Lo and S.J. Eggers, Conference on Programming Language Design and Implementation (June 1995).
  
  
• Balanced Scheduling: Instruction Scheduling When Memory Latency is Uncertain, D.R. Kerns and S.J. Eggers, Conference on Programming Language Design and Implementation (June 1993).
  
  

Code Scheduling and Register Allocation:

• The Marion System for Retargetable Instruction Scheduling , D.G. Bradlee, R.R. Henry, and S.J. Eggers, Conference on Programming Language Design and Implementation (June 1991).
  
  
• The Effect on RISC Performance of Register Set Size and Structure Versus Code Generation Strategy, D.G. Bradlee, S.J. Eggers, and R.R. Henry, International Symposium on Computer Architecture (May 1991).
  
  
• Integrating Register Allocation and Instruction Scheduling for RISCs, D.G. Bradlee, S.J. Eggers, and R.R. Henry, International Conference on Architectural Support for Programming Languages and Operating Systems (April 1991).
  
  

Accessible papers are in postscript format.