"On the Impact of Memory Models on Software Reliability in Multiprocessors", Laura Effinger-Dean, Alexander Jaffe, Thomas Moscibroda, Karin Strauss and Luis Ceze. PODC 2011.
"Accelerating Data Race Detection with Minimal Hardware Support", Rodrigo Gonzalez-Alberquilla, Karin Strauss, Luis Pinuel and Luis Ceze. EuroPar 2011.
"Data-Race Exceptions Have Benefits Beyond the Memory Model", Benjamin Wood, Luis Ceze and Dan Grossman. MSPC 2011.
"Operating System Implications of Fast, Cheap, Non-Volatile Memory", Katelin Bailey, Luis Ceze, Steven Gribble and Hank Levy. Usenix HotOS 2011.
"Crunching Large Graphs with Commodity Processors", Jacob Nelson, Brandon Myers, Andrew Hunter, Simon Kahan, Dan Grossman, Luis Ceze, Preston Briggs, Carl Ebeling and Mark Oskin. Usenix HotPar 2011.
"Isolating and Understanding Concurrency Errors Using Reconstructed Execution Fragments", Brandon Lucia, Ben Wood, and Luis Ceze. PLDI 2011.
"EnerJ: Approximate Data Types for Safe and General Low-Power Computation", Adrian Sampson, Werner Dietl, Emily Fortuna, Danushen Gnanapragasam, Luis Ceze, and Dan Grossman. PLDI 2011.
"RCDC: A Relaxed Consistency Deterministic Computer", Joe Devietti, Jacob Nelson, Tom Bergan, Luis Ceze and Dan Grossman. ASPLOS 2011.
"Dense Approximate Storage in Phase-Change Memory", Jacob Nelson, Adrian Sampson and Luis Ceze. ASPLOS-WACI 2011.
"The Deterministic Execution Hammer: How Well Does it Actually Pound Nails?", Tom Bergan, Joseph Devietti, Nicholas Hunt and Luis Ceze. Workshop on Determinism and Correctness in Parallel Programming (WoDet w/ ASPLOS) 2011.
"Characterizing the Performance and Energy Efficiency of Lock-Free Data Structures", Nick Hunt, Paramjit Singh Sandhu and Luis Ceze. INTERACT 2011 (held w/ HPCA 2011).
"Checked Load: Architectural Support for JavaScript Type-Checking on Mobile Processors", Owen Anderson, Emily Fortuna, Luis Ceze and Susan Eggers. HPCA 2011.
"A Limit Study of JavaScript Parallelism", Emily Fortuna, Owen Anderson, Luis Ceze and Susan Eggers. IISWC 2010 .
"Deterministic Process Groups in dOS", Tom Bergan, Nick Hunt, Luis Ceze and Steve Gribble. OSDI 2010.
"Composable Specifications for Structured Shared-Memory Communication", Ben Wood, Adrian Sampson, Luis Ceze and Dan Grossman. OOPSLA 2010.
"Failure is not an Option: Popular Parallel Programming, Josep Torrellas, Mark Oskin, et al., Report from Computing Community Consortium (CCC) Workshop on Advancing Computer Architecture Research (ACAR-1), October 2010.
"Conflict Exceptions: Providing Simple Concurrent Language Semantics with Precise Hardware Exceptions", Brandon Lucia, Luis Ceze, Karin Strauss, Shaz Qadeer and Hans Boehm. ISCA 2010.
"ColorSafe: Architectural Support for Debugging and Dynamically Avoiding Multi-variable Atomicity Violations", Brandon Lucia, Luis Ceze, Karin Strauss. ISCA 2010.
"Lock Prediction", Brandon Lucia, Joseph Devietti, Tom Bergan, Luis Ceze, Dan Grossman. HotPar'10.
"CoreDet: A Compiler and Runtime System for Deterministic Multithreaded Execution", Tom Bergan, Owen Anderson, Joe Devietti, Luis Ceze and Dan Grossman. ASPLOS 2010.
"DMP: Deterministic Shared Memory Multiprocessing", Joseph Devietti, Brandon Lucia, Luis Ceze and Mark Oskin. IEEE Micro Top Picks in Computer Architecture, Jan/Feb 2010.
"Finding Concurrency Bugs with Context-Aware Communication Graphs", Brandon Lucia and Luis Ceze. MICRO 2009.
"The Bulk Multicore Architecture for Improved Programmability", Josep Torrellas, Luis Ceze, James Tuck, Calin Cascaval, Pablo Montesinos, Wonsun Ahn, and Milos Prvulovic, CACM December 2009.
"Concurrency Discovery for Very Large Windows of Execution", Jacob Nelson and Luis Ceze, Workshop on Parallel Execution of Sequential Programs in Multicore Architectures (PESPMA held w/ ISCA), June 2009.
"The Case for System Support for Concurrency
Exceptions", Luis Ceze, Joseph Devieti, Brandon Lucia and Shaz
Qadeer. USENIX HotPar 2009.
"DMP: Deterministic Shared Memory Multiprocessing", Joseph Devietti, Brandon Lucia, Luis Ceze and Mark Oskin. ASPLOS 2009. Selected for the IEEE Micro Top Picks 2009.
"Self-Powered Processors", Wild and Crazy Ideas, ASPLOS 2009.
"Programming and Debugging Shared Memory Programs with Data Coloring",
by Luis Ceze, Christoph von Praun, Calin Cascaval, Pablo Montesinos, and Josep Torrellas,
Workshop on Compilers for Parallel Computing (CPC), January 2009.
"Atom-Aid: Detecting and Surviving Atomicity Violations", Brandon Lucia, Joseph Devietti, Karin Strauss, Luis Ceze. ISCA 2008. Selected for the IEEE Micro Top Picks 2008.
"Recording and Deterministically Replaying Shared-Memory Multiprocessor Execution Efficiently", Pablo Montesinos, Luis Ceze, Josep Torrellas. ISCA 2008. Selected for CACM Research Highlights 2009.
"Explicitly Parallel Programming with Shared-Memory is Insane: At Least Make it Deterministic!", Joseph Devietti, Brandon Lucia, Luis Ceze and Mark Oskin. SHCMP Workshoop, held with ISCA 2008.
"SoftSig: Software-Exposed Hardware Signatures for Memory Disambiguation", James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas. ASPLOS, March 2008. Selected for the IEEE Micro Top Picks 2008.
"Concurrency Control with Data Coloring", Luis Ceze, Christoph von Praun, Calin Cascaval, Pablo Montesinos, Josep Torrellas. MSPC-ASPLOS 2008.
"BulkSC: Bulk Enforcement of Sequential Consistency", Luis Ceze, James Tuck, Pablo Montesinos, Josep Torrellas. ISCA, June 2007. (presentation).
"Implicit Parallelism with Ordered Transactions", Christoph von Praun, Luis Ceze, Calin Cascaval. PPoPP, March 2007.
"Colorama: Architectural Support for Data-Centric Synchronization", Luis Ceze, Pablo Montesinos, Christoph von Praun, Josep Torrellas. HPCA, February 2007. (presentation)
"Scalable Cache Miss Handling for High Memory Level Parallelism ", James Tuck, Luis Ceze, Josep Torrellas. MICRO, December 2006.
"Bulk Disambiguation of Speculative Threads in Multiprocessors ", Luis Ceze, James Tuck, Calin Cascaval, Josep Torrellas. ISCA, June 2006. (presentation).
"POSH: A TLS Compiler that Exploits Program Structure", Wei Liu, James Tuck, Luis Ceze, Wonsun Ahn, Karin Strauss, Jose Renau and Josep Torrellas. PPoPP 2006, March 2006.
"Using Checkpoint-Assisted Value Prediction to Hide L2 Misses" Luis Ceze, Karin Strauss, James Tuck, Jose Renau and Josep Torrellas. ACM Transactions on Architecture and Code Optimization (TACO), June 2006.
"Are We Ready for High Memory-Level Parallelism?", Luis Ceze, James Tuck, Josep Torrellas. 4th Workshop on Memory Performance Issues (WMPI-2006) held with HPCA-2006. February 2006. Also appears in SIGMICRO Newsletter selection from WMPI-2006.
"Energy-Efficient Thread-Level Speculation on a CMP" Jose Renau, Karin Strauss, Luis Ceze, Smruti Sarangi, James Tuck, Wei Liu, Josep Torrellas. IEEE Micro Top Picks in Computer Architecture, Jan/2006 issue.
"Thread-Level Speculation on a CMP Can Be Energy Efficient", Jose Renau, Karin Strauss, Luis Ceze, Wei Liu, Smruti Sarangi, James Tuck, and Josep Torrellas. International Conference on Supercomputing (ICS), June 2005.
"Tasking with Out-of-Order Spawn in TLS Chip Multiprocessors: Microarchitecture and Compilation", Jose Renau, James Tuck, Wei Liu, Luis Ceze, Karin Strauss, and Josep Torrellas. International Conference on Supercomputing (ICS), June 2005.
"CAVA: Hiding L2 Misses with Checkpoint-Assisted Value Prediction", Luis Ceze, Karin Strauss, James Tuck, Jose Renau, Josep Torrellas. IEEE Computer Architecture Letters (CAL). December 2004.
"An Overview Of The Blue Gene/L System Software Organization". George Almasi, Ralph Bellofatto, Jose Brunheroto, Calin Cascaval, Jose G. Castanos, Paul Crumley, C. Christopher Erway, Derek Lieber, Xavier Martorell, Jose E. Moreira, Ramendra K. Sahoo, Alda Sanomiya, Luis Ceze, Karin Strauss. Parallel Processing Letters, Volume 13, Number 4, December 2003.
"An Overview of the Blue Gene/L System Software Organization". George Almasi, Ralph Bellofatto, Jose Brunheroto, Calin Cascaval, Jose G. Castanos, Luis Ceze and others. International Conference on Parallel and Distributed Computing (Euro-Par), August 2003.
"Full Circle: Simulating Linux Clusters on Linux Clusters". Luis Ceze, Karin Strauss and others. Fourth LCI International Conference on Linux Clusters (CWCE), June 2003.
"BGLsim: Complete System Simulator for Blue Gene/L", Luis Ceze and Wilson Ruggiero. Polytechnic School Technical Briefing. University of Sao Paulo. Sao Paulo, Brazil, August 2002.
"BGLsim: Complete System Simulator for Blue Gene/L", Luis Ceze. M.Eng. thesis. University of Sao Paulo. Sao Paulo, Brazil, August 2002.
"An Overview of the Blue Gene/L Supercomputer". N. R. Adiga, G. Almasi and others. IEEE Supercomputing (SC), November 2002.
"Blue Gene/L, a system-on-a-chip". G. Almasi, G. S. Almasi and others. 2002 IEEE International Conference on Cluster Computing (CC), September 2002.
"Evaluation of a Multithreaded Architecture for Cellular Computing". Calin Cascaval, Jose G. Castanos, Luis Ceze, Monty Denneau, Manish Gupta and others. IEEE Eighth High Performance Computer Architecture (HPCA 2002), February 2002.
"Cellular Supercomputing with System-on-a-Chip". G. Almasi, G. S. Almasi and others. IEEE International Solid State Circuits Conference (ISSCC), February 2002.
"Novas Aplicacoes Multimidia na Internet2 (New Multimedia Applications for Internet 2)". V. Bastos, E. Bergamini, and others. Computer Networks Brazilian Society Conference (SBRC), Brazil, May 2001.
"An Environment for Easy Cross Synchronization of Multimedia Web Based Material", Itana Stiubiener, Luis Ceze, Karin Strauss and others. Frontiers in Education (FIE), October 2000.