"Atom-Aid: Detecting and Surviving Atomicity Violations", Brandon Lucia, Joseph Devietti, Karin Strauss, Luis Ceze. ISCA 2008.
"Recording and Deterministically Replaying Shared-Memory Multiprocessor Execution Efficiently", Pablo Montesinos, Luis Ceze, Josep Torrellas. ISCA 2008.
"SoftSig: Software-Exposed Hardware Signatures for Memory Disambiguation", James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas. ASPLOS, March 2008.
"Concurrency Control with Data Coloring", Luis Ceze, Christoph von Praun, Calin Cascaval, Pablo Montesinos, Josep Torrellas. MSPC-ASPLOS 2008.
"BulkSC: Bulk Enforcement of Sequential Consistency", Luis Ceze, James Tuck, Pablo Montesinos, Josep Torrellas. ISCA, June 2007. (presentation).
"Implicit Parallelism with Ordered Transactions", Christoph von Praun, Luis Ceze, Calin Cascaval. PPoPP, March 2007.
"Colorama: Architectural Support for Data-Centric Synchronization", Luis Ceze, Pablo Montesinos, Christoph von Praun, Josep Torrellas. HPCA, February 2007. (presentation)
"Scalable Cache Miss Handling for High Memory Level Parallelism ", James Tuck, Luis Ceze, Josep Torrellas. MICRO, December 2006.
"Bulk Disambiguation of Speculative Threads in Multiprocessors ", Luis Ceze, James Tuck, Calin Cascaval, Josep Torrellas. ISCA, June 2006. (presentation).
"POSH: A TLS Compiler that Exploits Program Structure", Wei Liu, James Tuck, Luis Ceze, Wonsun Ahn, Karin Strauss, Jose Renau and Josep Torrellas. PPoPP 2006, March 2006.
"Using Checkpoint-Assisted Value Prediction to Hide L2 Misses" Luis Ceze, Karin Strauss, James Tuck, Jose Renau and Josep Torrellas. ACM Transactions on Architecture and Code Optimization (TACO), June 2006.
"Are We Ready for High Memory-Level Parallelism?", Luis Ceze, James Tuck, Josep Torrellas. 4th Workshop on Memory Performance Issues (WMPI-2006) held with HPCA-2006. February 2006. Also appears in SIGMICRO Newsletter selection from WMPI-2006.
"Energy-Efficient Thread-Level Speculation on a CMP" Jose Renau, Karin Strauss, Luis Ceze, Smruti Sarangi, James Tuck, Wei Liu, Josep Torrellas. IEEE Micro Top Picks in Computer Architecture, Jan/2006 issue.
"Thread-Level Speculation on a CMP Can Be Energy Efficient", Jose Renau, Karin Strauss, Luis Ceze, Wei Liu, Smruti Sarangi, James Tuck, and Josep Torrellas. International Conference on Supercomputing (ICS), June 2005.
"Tasking with Out-of-Order Spawn in TLS Chip Multiprocessors: Microarchitecture and Compilation", Jose Renau, James Tuck, Wei Liu, Luis Ceze, Karin Strauss, and Josep Torrellas. International Conference on Supercomputing (ICS), June 2005.
"CAVA: Hiding L2 Misses with Checkpoint-Assisted Value Prediction", Luis Ceze, Karin Strauss, James Tuck, Jose Renau, Josep Torrellas. IEEE Computer Architecture Letters (CAL). December 2004.
"An Overview Of The Blue Gene/L System Software Organization". George Almasi, Ralph Bellofatto, Jose Brunheroto, Calin Cascaval, Jose G. Castanos, Paul Crumley, C. Christopher Erway, Derek Lieber, Xavier Martorell, Jose E. Moreira, Ramendra K. Sahoo, Alda Sanomiya, Luis Ceze, Karin Strauss. Parallel Processing Letters, Volume 13, Number 4, December 2003.
"An Overview of the Blue Gene/L System Software Organization". George Almasi, Ralph Bellofatto, Jose Brunheroto, Calin Cascaval, Jose G. Castanos, Luis Ceze and others. International Conference on Parallel and Distributed Computing (Euro-Par), August 2003.
"Full Circle: Simulating Linux Clusters on Linux Clusters". Luis Ceze, Karin Strauss and others. Fourth LCI International Conference on Linux Clusters (CWCE), June 2003.
"BGLsim: Complete System Simulator for Blue Gene/L", Luis Ceze and Wilson Ruggiero. Polytechnic School Technical Briefing. University of Sao Paulo. Sao Paulo, Brazil, August 2002.
"BGLsim: Complete System Simulator for Blue Gene/L", Luis Ceze. M.Eng. thesis. University of Sao Paulo. Sao Paulo, Brazil, August 2002.
"An Overview of the Blue Gene/L Supercomputer". N. R. Adiga, G. Almasi and others. IEEE Supercomputing (SC), November 2002.
"Blue Gene/L, a system-on-a-chip". G. Almasi, G. S. Almasi and others. 2002 IEEE International Conference on Cluster Computing (CC), September 2002.
"Evaluation of a Multithreaded Architecture for Cellular Computing". Calin Cascaval, Jose G. Castanos, Luis Ceze, Monty Denneau, Manish Gupta and others. IEEE Eighth High Performance Computer Architecture (HPCA 2002), February 2002.
"Cellular Supercomputing with System-on-a-Chip". G. Almasi, G. S. Almasi and others. IEEE International Solid State Circuits Conference (ISSCC), February 2002.
"Novas Aplicacoes Multimidia na Internet2 (New Multimedia Applications for Internet 2)". V. Bastos, E. Bergamini, and others. Computer Networks Brazilian Society Conference (SBRC), Brazil, May 2001.
"An Environment for Easy Cross Synchronization of Multimedia Web Based Material", Itana Stiubiener, Luis Ceze, Karin Strauss and others. Frontiers in Education (FIE), October 2000.