Cebollita

Cebollita Instruction Encoding and Operation Specification

Last modified: May 04, 2009 		Sloop SMOK
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Cebollita Instruction Encoding and Operation Specification

This document describes the encoding and operation of the instruction set supported by the Cebollita ISA software simulator. All instructions listed are available to assembly language programmers using the Cebollita software simulator.

Only some of these instructions are generated by the Cebollita compiler, so that

only some of these instructions need to be built in student projects to support compiler-generated Cebollita applications.
The information with each instruction indicates whether or not the compiler will generate it. Instructions not generated by the compiler are listed in blue.

Note that there are three definitions of Mips-like ISA's that students might consult as references:

  1. An online reference for the actual Mips ISA, like this one.
  2. The Patterson & Hennessy text, and especially Appendix A on SPIM.
  3. This guide to the Cebollita instruction set.
The first two disagree with each other in small ways (including in instruction encoding). The Cebollita instruction set takes further liberties with the actual Mips ISA to make building a Cebollita processor easier. As concepts, these distinctions are completely unimportant. They exist only to simplify the construction of a Cebollita processor in SMOK. Distinctions from the Appendix A, Hennessy and Patterson, specification are noted in red.

Instructions: Alphabetical by Assembler Opcode

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