| This device allows reading and writing of a block
device. The unit of transfer is a 512 byte sector. The device
performs DMA transfer and must be connected to a Memory component.
To perform an I/O operation:
- Write the memory address for the transfer. Memory addresses
must be aligned on a 512-byte boundary.
- Write the disk sector number.
- Write the count of the number of sectors to transfer.
The maximum transfer is 256 sectors.
- Write the control to start the transfer.
Multiple internal values can be written in a single cycle.
The control value
is always written after other values written in the same cycle have
been latched.
Transfers occur asynchronously, and may complete at any time. When
one does, the exception status bit is asserted,
the status cause is set to BLK_EX_IO_COMP,
and the exception output port is set to one.
These values persist until a clear control is written.
Writes to the control input have the following meaning:
- Bit 15: start a read
- Bit 14: start a write
- Bit13: clear exceptions
All other bits are ignored. Only one command may be given
at a time. A clear command resets both the status register
and the exception output port. A clear command thus
terminates any ongoing IO operation. (No IO completion event occurs
in this case.)
Reads of the status port provide the following information:
- Bit 15: device is reading (transfering from disk to memory)
- Bit 14: device is writing
- Bit 13: an exception has been raised
- Bits 0 through 7: exception cause mask as an unsigned integer:
- 0: I/O completion
- 1: Memory address out of bounds
- 2: Disk address out of bounds
- 3: Attempt to write to the controller while it is busy
- 4: Unaligned memory address
- 5: Illegal control command
- 6: Sector count for operation is zero
- 7-255: Unused
Only one exception may be raised at a time. Exceptions remain asserted
until a clear control is written. IO completion events that occur
while another exception is being asserted remain pending; the others
overwrite the cause output with no warning.
Writes to ports other than the control port are ignored while
an exception is being signaled.
The effect of an operation involving an out of bounds address is
undefined.
Exceptions 3-6 occur during the clock down phase of processing.
This means that they cannot be acted on until the next cycle.
Exceptions 0-2 occur during clock up, but at times that are
arbitrarily delayed from the write to the control that started the
transfer.
It is always legal to read the status port and to write a clear command
to the control port.
The address values and sector count are not guaranteed to be preserved
across read or write operations.
Useful mask definitions for this component are in
smokblkdev.h, which is included with the
SMOK distribution.
Note: The Ex output port is redundant, as it is simply a mirror
of bit 13 of the Status output port. It is provided for convenience.
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