| Remarks
| A Register File contains a user-defined number of internal
registers (of user-defined width), and a user-defined number of
read and write port sets to access them. On the ClockUp portion of each
cycle, the two output values are the current values of the registers named
by the R0# and R1# input lines. On ClockDown, if the W control line
is asserted (non-zero), the register named by the W# input is updated
with the value of the WData input.
For convenience in building Mips-like machines, Register Files
support "locking" of register 0.
Locking sets that register to 0 and prevents it from being written.
By default this option is off.
|