| Remarks
| The output is the result of shifting the Data input the
number of bits given by the Amt input.
Shift direction is given by the L/R input: 0 for left, 1 for right.
Shifts do not sign-extend.
A shift amount of zero is legal but is a no-op.
Shift amounts greater than the data width have unpredicatable results.
Note: To shift a constant amount, use either a
BitCombine component
(to shift left) or simply set the bit extract paramenters of the
input port receiving the shifted bits (to shift right). To
sign-extend, use a
SignExtend component. |
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