Lab 1&2: An Introduction to SystemVerilog and Digital Components

Task 1 – SystemVerilog Design and Simulation

The designs in this class will be done through the Intel Quartus Prime software. This is preloaded on machines in the lab (CSE 003), and you are free to do all the work on these PCs. However, you can install the software on your own computer, if desired, by following the Installing Quartus page.

Open the Quartus Tutorial and complete Sections 0 through 8. You will simulate two designs: mux2_1 and mux4_1. Be sure to do all of the steps and ask the course staff for help when you encounter issues. During your lab demo, you will need to show your simulation of mux4_1 and give a brief verbal explanation of what mux4_1 actually does.

Task 2 – Logic Investigation

Read through the FPGA Overview document. Make sure you know where the LEDs, switches, and push buttons are on the DE1 and then connect it to your computer and power on your board. Feel free to play around with preloaded program to get a feel for the board inputs and outputs.

Now finish the rest of the Quartus Tutorial to program your board with the provided top-level module lab1.sv (code). Refer to the code comments and play with the appropriate inputs to discern the logical behaviors of our input and output signals:

1. Which logical value (0 = FALSE = GND, 1 = TRUE = VDD) turns the red LEDs on?
2. Which position (up or down) of the slider switch outputs a TRUE?
3. Which position of the push button (pressed or unpressed) outputs a TRUE?

Task 3 – Add Simple Logic

Now modify lab1.sv to implement the following additional logic. You will only need to add one line of code beneath each TODO comment. Refer to Lecture 2 for the syntax for gate modules and logical operators.

1. Place an inverter (NOT gate) between SW2 and LEDR4.
2. Use a second inverter to connect the output of the first inverter to LEDR5.
3. Place a two-input NOR gate between two unused switches and an unused LED (your choice).

Recompile your modified project and load it onto your board to make sure that it behaves as you would expect. Don't forget to upload your modified lab1.sv alongside your lab report.

Task 4 – Digit Recognizer (Design)

Electronics can be cold and impersonal so let's change that by having your DE1 recognize you! We want to design a circuit that will light up an LED only when you input the last digit of your student ID number. Your goal is to design the circuit out of NOT, NAND, and NOR gates using the fewest number of gates possible.

1. Find the last digit of your student ID number in the "Digit" column of Table 1 below – this is known as binary-coded decimal.
2. Design the circuit by hand that will output a 1 only when the switch code matches your particular Digit. Be sure that it also outputs a 0 for invalid inputs (e.g., all switches are 1).

Task 5 – Multi-Digit Recognizer (Implementation)

Recognizing only one digit is a bit simplistic, so we’d like to scale it up to handle more digits.

1. Copy your Lab 1 project folder (or unzip a fresh copy of Lab1_files_Q17.zip) into a new Lab 2 project folder.
2. Download lab2.sv and lab2_tb.sv (code) into your Lab 2 project folder, add them to your Quartus project, and set lab2.sv as your top-level module. Note that we are giving you a pre-written test bench!
   Note that the testbench uses an "initial" statement to generate the input patterns, with #10 delays and a for-statement. However, the testbench is non-synthesizable (i.e., the code doesn't compile to hardware and is therefore only useful/meaningful in simulation).
3. In lab2.sv, implement the logic for a circuit that recognizes the last two digits of your student ID number. SW3-SW0 will be the rightmost digit, encoded as in Task 4, and SW7-SW4 will be the next digit, using a similar code (e.g., the digit 8 is encoded as SW7=1, SW6=0, SW5=0, SW4=0). Make sure to test your design in simulation BEFORE mapping it to the FPGA.

Lab Report

Due before Wednesday section, submitted as a PDF on Gradescope.

• A simple, accurate explanation of what the mux4_1 circuit does. Note: We do NOT want a written description of the circuit gates, we want a description of what it actually does – if you're not sure, see how we described how the mux2_1 circuit works in Section 2 of the Quartus Tutorial.
• The value of the signal (TRUE or FALSE) that makes the LEDs light up.
• The position of the switches (up or down) that cause them to output TRUE.
• The position of the push buttons (pressed or unpressed) that cause them to output TRUE.
• A circuit diagram of your 1-digit recognizer circuit.
• A screenshot of the ModelSim simulation for your 2-digit recognizer design (always with explanation!).
• How many hours (estimated) it took to complete this lab in total, including reading, planning, designing, coding, debugging, and testing.
• Separately, upload your finished/modified code (lab1.sv, lab2.sv, and lab2_tb.sv).

Lab Demo

Due by the end of the day on Friday, but typically during your assigned demo slot or a scheduled support hour.

• Demonstrate your working simulation of the mux4_1 circuit.
• Demonstrate your working NOR and double inverter circuits.
• Explain your ModelSim simulation of your 2-digit recognizer circuit.
• Demonstrate your 2-digit recognizer working in hardware.

Rubric