Advisor: Luis Ceze
Supervisory Committee: Luis Ceze (Chair), Visvesh Sathe (GSR, EE), Mark Oskin, and Ras Bodik
Abstract: The recent collapse of Dennard scaling has left behind a performance and energy gap which has accelerated the pace towards specialized computing technologies and alternative computing techniques. It is no longer the case that reducing transistor sizes yields the same performance and energy efficiency gains that were commonplace a decade or two ago. At the same time, advances in data mining, computer vision, machine learning, and artificial intelligence relentlessly continue to demand increasing amounts of computation and energy resources. This has culminated into an unprecedented diversification of the computing landscape from GPGPUs, field programmable gate arrays, to even full custom ASICs to sustain these computational demands. While new technologies and computing platforms promise compelling performance and energy efficiency benefits, they present their own unique design challenges and idiosyncratic design constraints.
My work focuses on taming these idiosyncratic design challenges for specialized computing substrates and emerging technologies, and proposes judicious hardware and application codesign to maximize the benefits of specialization efforts. I define hardware and application codesign as the process of modifying the application and hardware synergistically to improve the overall performance, energy efficiency, computational density, or accuracy. I will demonstrate how to translate codesign insights into these improvements on top of specialized computing platforms across three regimes: (1) application codesign for near-data processing, (2) codesigning emerging applications with stochastic computation, and (3) automating the codesign processing for stochastic computing and coarse-grained reconfigurable arrays.