ebelingcs.washington.edu

Crunching large graphs with commodity processors

J. Nelson, B. Myers, A.H. Hunter, P. Briggs, L. Ceze, C. Ebeling, D. Grossman, S. Kahan, M. OskinProceedings of the 3rd USENIX conference on Hot topic in parallelismUSENIX Association , 2011.

Energy-efficient specialization of functional units in a coarse-grained reconfigurable array

B.C. Van Essen, R. Panda, A. Wood, C. Ebeling, S. HauckProceedings of the 19th ACM/SIGDA International Symposium on Field Programmable Gate ArraysACM , 2011.

A Model for Programming Large-Scale Configurable Computing Applications'

C. Ebeling, S. Hauck, C. Olson, M. Kim, C. Clausen,  BorisĀ KogonFirst Workshop on the Intersections of Computer Architecture and Reconfigurable Logic , 2010.

Managing short versus long lived signals in Coarse-Grained Reconfigurable Arrays

B. VanĀ Essen, R. Panda, C. Ebeling, S. HauckInternational Conference on Field-Programmable Logic and ApplicationsIEEE , 2010.

SPR: an architecture-adaptive CGRA mapping tool

S. Friedman, A. Carroll, B. Van Essen, B. Ylvisaker, C. Ebeling, S. HauckACM/SIGDA International Symposium on Field-Programmable Gate ArraysACM , 2009.

Static versus scheduled interconnect in Coarse-Grained Reconfigurable Arrays

B. Van Essen, A. Wood, A. Carroll, S. Friedman, R. Panda, B. Ylvisaker, C. Ebeling, S. HauckInternational Conference on Field-Programmable Logic and Applications , 2009.

Macah: A C-Level Language for Programming Kernels on Coprocessor Accelerators

B. Ylvisaker, A. Carroll, S. Friedman, V.B. Essen, C. Ebeling, D. Grossman, S. HauckUniversity of Washington, Department of CSE , 2008.

Implementing Molecular Dynamics simulation using the Hybrid Micro-Parallel model

B. Van Essen, B. Ylvisaker, C. EbelingSubmitted to IEEE Symposium on Field-Programmable Custom Computing MachinesIEEE , 2007.

Macah: A "C-Level" Programming Language for Kernel Acceleration on Hybrid Micro-Parallel Architectures

B. Ylvisaker, B. Van Essen, C. Ebeling, D. GrossmanSubmitted to LCTES '07: Proceedings of the 2007 ACM SIGPLAN/SIGBED conference on Language, Compilers and Tool Support for Embedded SystemsACM Press , 2007.

Abstract Verilog: A Hardware Description Language for Novice Students

C. Ebeling, B. FrenchInternational Symposium on Microelectronics Systems EducationIEEE Computer Society , 2007.

Configurable Computing Platforms - Promises, Promises

C. EbelingIEEE 17th International Conference on Application-Specific System, Architectures and Processors (ASAP 2006) , 2006.

Reducing the Space Complexity of Pipelined Routing Using Modified Range Encoding

A. Carroll, C. EbelingProceedings of the International Conference on Field Programmable Logic and Applications , 2006.  

<p>Best paper award for FPGA technology.</p>

A Type Architecture for Hybrid Micro-Parallel Computers

B. Ylvisaker, B. Van Essen, C. EbelingIEEE Symposium on Field-Programmable Custom Computing MachinesIEEE , 2006.

PipeRoute: a pipelining-aware router for reconfigurable architectures

A. Sharma, C. Ebeling, S. HauckIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  25 :3 , 2006.

Architecture-adaptive routability-driven placement for FPGAs

A. Sharma, S. Hauck, C. EbelingInternational Conference on Field Programmable Logic and Applications , 2005.

Fine-Grained Parallel Processor for Fast Cell Simulations

J.F. Keane, C. Bradley, K. West, P. Loriaux, N. Clark, E. Lam, A. Wahba, C. Crawford, A. MacDuffie, M. Pettigrew, A. Sarkar, L. Atlas, C. Ebeling, R.B. FranzaScience , 2004.

QuickRoute: a fast routing algorithm for pipelined architectures

S. Li, C. EbelingIEEE International Conference on Field-Programmable Technology , 2004.

Implementing an OFDM Receiver on the RaPiD Reconfigurable Architecture

C. Ebeling, C. Fisher, G. Xing, M. Shen, H. LiuIEEE Transactions on Computing: Special Issue on Programmable Logic and Applications , 2004.

Exploration of Pipelined FPGA Interconnect Structures

A. Sharma, K. Compton, C. Ebeling, S. HauckACM/SIGDA International Symposium on Field-Programmable Gate Arrays , 2004.

A Compiled Accelerator for Biological Cell Signalling Simulations

J.F. Keane, C. Bradley, C. EbelingTwelfth International Symposium on Field Programmable Gate Arrays (FPGA04) , 2004.

PipeRoute: A pipelining-aware router for FPGAs

A. Sharma, C. Ebeling, S. HauckSymposium on Field Programmable Gate Arrays (FPGA03)ACM Press , 2003.  

<p>New York</p>

Implementing an OFDM Receiver on the RaPiD Reconfigurable Architecture

C. Ebeling, C. Fisher, G. Xing, M. Shen, H. LiuInternational Conference on Field-Programmable Logic and ApplicationsSpringer , 2003.

Compiling to Coarse-Grained Adaptable Architectures

C. EbelingUniversity of Washington Technical Report :UW-CSE-02-06-01 , 2002.

An Emulator for Exploring RaPiD Configurable Computing Architectures

C. Fisher, K. Rennie, G. Xing, S.G. Berg, K. Bolding, J.H. Naegle, D. Parshall, D. Portnov, A. Sulejmanpasic, C. EbelingInternational Conference on Field-Programmable Logic and ApplicationsSpringer-Verlag , 2001.  

<p>Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA</p>

Distributed-memory parallel routing for field-programmable gate arrays

P.K. Chan, M.D.F. Schlag, C. Ebeling, L. McMurchieIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  19 :8 , 2000.

Architecture design of reconfigurable pipelined datapaths

D.C. Cronquist, C. Fisher, M. Figueroa, P. Franklin, C. EbelingAdvanced Research in VLSI, 1999. Proceedings. 20th Anniversary Conference on , 1999.

Using precomputation in architecture and logic resynthesis

S. Hassoun, C. EbelingIEEE/ACM International Conference on Computer Aided DesignACM Press , 1998.  

<p>San Jose, California, United States</p>

Specifying and Compiling Applications for RaPiD

D.C. Cronquist, P. Franklin, S.G. Berg, C. EbelingIEEE Symposium on Field-Programmable Custom Computing MachinesIEEE Computer Society Press , 1998.

Mesh routing topologies for multi-FPGA systems

S. Hauck, G. Borriello, C. EbelingIEEE Transactions on VLSI Systems  6 :3 , 1998.

An Overview of Prediction-Based Architectural Retiming

S. Hassoun, C. EbelingInternational Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU-97) , 1997.

Experiments in the Iterative Application of Resynthesis and Retiming

S. Hassoun, C. EbelingInternational Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU-97) , 1997.

Sequential Logic Synthesis using Precomputation

S. Hassoun, C. EbelingInternational Workshop on Logic Synthesis (IWLS-97) , 1997.

Whither configurable computing?

C. EbelingThe Thirtieth Hawaii International Conference on System Sciences  1 , 1997.

Mapping applications to the RaPiD configurable architecture

C. Ebeling, D.C. Cronquist, P. Franklin, J. Secosky, S.G. BergIEEE Symposium on Field-Programmable Custom Computing MachinesIEEE Computer Society Press , 1997.

ChaosLAN: Design and implementation of a gigabit LAN using chaotic routing

N. McKenzie, K. Bolding, C. Ebeling, L. SnyderProceedings of the Workshop on Parallel Computer Routing and Communication , 1997.

Configurable computing: the catalyst for high-performance architectures

C. Ebeling, D.C. Cronquist, P. FranklinIEEE International Conference on Application-Specific Systems, Architectures and Processors , 1997.

Experiences with the MacTester in computer science and engineering education

N.R. McKenzie, C. Ebeling, L. McMurchie, G. BorrielloIEEE Transactions on Education  40 :1 , 1997.

Seeking Solutions in Configurable Computing

W.H. Mangione-Smith, B. Hutchings, D. Andrews, A. DeHon, C. Ebeling, R. Hartenstein, O. Mencer, J. Morris, K. Palem, V.K. Prasanna, H.A.E. SpaanenburgComputerIEEE Computer Society  30 , 1997.

RaPiD - Reconfigurable Pipelined Datapath

C. Ebeling, D.C. Cronquist, P. FranklinInternational Workshop on Field-Programmable Logic and ApplicationsSpringer-Verlag, Berlin , 1996.

Architectural retiming: pipelining latency-constrained circuits

S. Hassoun, C. Ebeling33rd annual conference on Design automation conferenceACM Press , 1996.  

<p>Las Vegas, Nevada, United States</p>

The Triptych FPGA architecture

G. Borriello, C. Ebeling, S.A. Hauck, S. BurnsIEEE Transactions on Very Large Scale Integration Systems  3 :4 , 1995.

PathFinder: A negotiation-based performance-driven router for FPGAs

L. McMurchie, C. EbelingACM International Symposium on Field-Programmable Gate ArraysACM Press , 1995.  

<p>Monterey, California, United States</p>

Placement and routing tools for the Triptych FPGA

C. Ebeling, L. McMurchie, S.A. Hauck, S. BurnsIEEE Transactions on VLSI Systems  3 :4 , 1995.

On the performance of level-clocked circuits

C. Ebeling, B. LockyearAdvanced Research in VLSI, 1995. Proceedings., Sixteenth Conference on , 1995.

Architectural Retiming: An Overview

S. Hassoun, C. EbelingTAU , 1995.

Mesh Routing Topologies for FPGA Arrays

S. Hauck, G. Borriello, C. EbelingACM/SIGDA 2nd International Workshop on Field-Programmable Gate Arrays , 1994.

Springbok: A Rapid-Prototyping System for Board-Level Design

S.A. Hauck, G. Borriello, C. EbelingInternational Workshop on Field-Programmable Gate Arrays , 1994.

Optimal retiming of level-clocked circuits using symmetric clock schedules

B. Lockyear, C. EbelingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  13 :9 , 1994.

Mesh routing topologies for multi-FPGA systems

S. Hauck, G. Borriello, C. EbelingProceedings of the IEEE International Conference on Computer Design: VLSI in Computers and Processors , 1994.

An FPGA for implementing asynchronous circuits

S. Hauck, S. Burns, G. Borriello, C. EbelingIEEE Design & Test of Computers  11 :3 , 1994.

CRANIUM: An Interface for Message Passing on Adaptive Packet Routing Networks

N. McKenzie, K. Bolding, C. Ebeling, L. SnyderProceedings of the First International Workshop on Parallel Computer Routing and Communication, PCRCW'94 , 1994.

The Chaos Router Chip: Design and Implementation of an Adaptive Router

K. Bolding, C.E. al.Proceedings of the IFIP Conference on VLSI (VLSI-93) , 1993.

Minimizing the Effect of Clock Skew Via Circuit Retiming

B. Lockyear, C. EbelingProceedings of TAU'93: 1993 ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems , 1993.

The practical application of retiming to the design of high-performance systems

B. Lockyear, C. EbelingIEEE/ACM International Conference on Computer Aided DesignIEEE Computer Society Press , 1993.  

<p>Santa Clara, California, United States</p>

SubGemini: Identifying subcircuits using a fast subgraph isomorphism algorithm

M. Ohlrich, C. Ebeling, E. Ginting, L. SatherInternational on Design Automation ConferenceACM Press , 1993.  

<p>Dallas, Texas, United States</p>

Routing-directed Placement for the Triptych FPGA

E.A. Walkup, S.A. Hauck, G. Borriello, C. EbelingACM/SIGDA Workshop on Field-Programmable Gate Arrays , 1992.

Practical Issues in Retiming Latch-Based Circuits

C. EbelingUniversity of Washington Technical Report :CSE-TR-92-10-07 , 1992.

TRIPTYCH: An FPGA Architecture with Integrated Logic and Routing

S.A. Hauck, G. Borriello, C. EbelingProceedings of the Brown/MIT Conference on Advanced Research in VLSI and Parallel Systems , 1992.

Optimal Retiming of Multi-Phase Level-Clocked Circuits

B. Lockyear, C. EbelingProceedings of the Conference on Advanced Research in VLSI. , 1992.

MONTAGE: An FPGA for Synchronous and Asynchronous Circuits

S. Hauck, G. Borriello, S. Burns, C. EbelingInternational Workshop on Field-Programmable Logic and ApplicationsSpringer-Verlag, Berlin , 1992.

Teaching Design with a Next-Generation Schematic Capture System

G. Borriello, L. McMurchie, C. EbelingProceedings of the Microelectronics Systems Education Conference , 1991.

Establishing a Modern Digital Design Laboratory

C. Ebeling, G. BorrielloProceedings of the Microelectronics Systems Education Conference , 1991.

Rapid Low-Cost Display of Spline Surfaces

R. Bedichek, C. Ebeling, G. Winkenbach, T. DeRoseProceedings of the Conference on Advanced Research in VLSIThe MIT Press , 1991.

TRIPTYCH: a New FPGA Architecture

C. Ebeling, G. Borriello, S.A. Hauck, D. Song, E.A. WalkupInternational Symposium on FPGAsAbingdon, England , 1991.

MacTester: A Low-Cost Functional Tester for Interactive Testing and Debugging

C. Ebeling, N. McKenzieProceedings of the 1990 Microelectronic Systems Education Conference , 1990.

Making the Most of a Design Project

C. Ebeling, G. BorrielloProceedings of the 1990 Microelectronic Systems Education Conference , 1990.

Computers, Chess, and Cognition

H. Berliner, C. EbelingSpringer-Verlag , 1990.

A One-Year Graduate Course Sequence in VLSI Design and CAD

G. Borriello, C. EbelingProceedings of the 1989 VLSI Education Conference , 1989.

Apex: Two Architectures for Generating Parametric Curves and Surfaces

T. DeRose, M. Bailey, B. Barnard, R. Cypher, D. Dobrikin, C. Ebeling, S. Konstantinidou, L. McMurchie, H. Mizrahi, B. Yost.The Visual Computer  5 :3 , 1989.

Measuring the Performance Potential of Chess Programs

H. Berliner, G. Goetsch, M. Campbell, C. EbelingArtificial Intelligence  43 :1 , 1989.  

<p>An earlier version appeared in Advances in Computer Chess 5, Elsevier Science Publishing Co., 1989.</p>

Pattern Knowledge and Search: The SUPREM Architecture

H. Berliner, C. EbelingArtificial Intelligence  38 :2 , 1989.

WireLisp: combining graphics and procedures in a circuit specification language

C. Ebeling, Z. WuIEEE/ACM International Conference on Computer Aided Design , 1989.

SUPREM: An Architecture Based on Pattern Knowledge and Search

H. Berliner, C. EbelingProceedings of the 3rd International Conference on Supercomputing , 1988.

GeminiII: a second generation layout validation program

C. EbelingIEEE/ACM International Conference on Computer Aided Design , 1988.

Hardware Accelerators for Electrical CAD

C. Ebeling, H. BerlinerAdam Hilger , 1987.

The SUPREM Architecture: A New Intelligent Paradigm

H. Berliner, C. EbelingArtificial Intelligence  28 :1 , 1986.

All the Right Moves: A VLSI Architecture for Chess

C. EbelingThe MIT Press (ACM Distinguished Dissertation Series) , 1986.

The design and implementation of a VLSI chess move generator

C. Ebeling, A. PalayInternational Symposium on Computer Architecture (ISCA) , 1984.

Validating VLSI Circuit Layout by Wirelist Comparison

C. Ebeling, O. ZajicekProceedings of the IEEE International Conference on Computer Aided Design (ICCAD-83) , 1983.

Design of a User Microprogramming Support System

C. Ebeling, R. GuhaProceedings of the 15th IEEE Computer Society Conference , 1977.