Michael Taylor has been at UW CSE since Sept 2017, after spending a year as a visiting researcher at Google.
Prior to that, he was a professor in the Department of Computer Science and
Engineering at the University of California, San Diego from 2005 to 2016. He
received a PhD in Electrical Engineering and Computer Science from MIT, and
his research centers around computer architecture but spans the stack from VLSI to compilers.
Prof. Taylor leads the Bespoke Silicon Group. See the link for his team's latest and greatest!
Taylor's personal webpage is located at michaeltaylor.org.
Taylor was lead architect of the 16-core MIT Raw tiled multicore processor, one of the earliest multicore processors, which was commercialized into the Tilera TILE64 architecture. Recently, in 2017, Intel Skylake SP has adopted our scalable mesh of cores architecture that we proposed. He co-authored the earliest published research on dark silicon, including a paper that derives the utilization wall that causes dark silicon, and a prototype massively specialized processor called GreenDroid. Taylor also wrote a paper that establishes the definitive taxonomy, the Four Horsemen, for the semiconductor industry's approaches to dealing with the problem, and a follow-on paper on the Landscape of the Dark Silicon Design Regime. Taylor's research on dark silicon fed into the ITRS 2008 report that led Mike Mueller of ARM to coin the term "dark silicon". More recently, Taylor wrote the first academic paper on Bitcoin mining chips.
In 2016, Taylor's team published the first paper on ASIC Clouds. Taylor's group made the case that datacenters full of ASICs are in our near future, and showed a prototypical ASIC Cloud architecture, how they should be designed, and how they save TCO. They proposed Deep Learning ASIC Clouds before Google announced their TPU, and also proposed the use of video transcoding clouds for YouTube. If you read only one architecture paper this year, you should read the IEEE Micro 2017 Top Picks Issue ASIC Cloud Paper.
In 2017, Taylor's group published the first architecture paper on NRE, non-recurring engineering expense. They show how minimizing NRE can be more important for ASIC Cloud feasibility than optimizing accelerator speedup or energy efficiency. They present the first ever architect's model for NRE, using current industry parameters (paper) (youtube talk), and opening up a new area of research. With the rise of specialization and the end of Moore's law, driving down the cost of design will surely be an important driver of future research.
Taylor occasionally helps companies and other legal professionals evaluate their patent portfolios, and provide advice to companies leveraging the Tilera TILE64 architecture. He has broad expertise in hardware and software, and on the Bitcoin cryptocurrency. Taylor's research is funded primarily by the National Science Foundation (NSF), including the Secure and Trustworthy Cyberspace Program, and DARPA/MARCO's C-FAR, part of STARnet.
Between the gaps at school, Taylor worked on Apple's NuKernel microkernel, and co-wrote the first version of Connectix Virtual PC, an x86-to-PowerPC dynamic translation engine, which was acquired by Microsoft. He also contributed to the ChipWrights Visual Signal Processor in its earliest stages.
Taylor received the NSF CAREER Award in 2009 and tenure in 2012.