Areas of interest: 

Computer architecture, hardware design and prototyping, dark silicon, cryptocurrency mining

(Arriving September 2017)

I have been a professor in the Department of Computer Science and Engineering at the University of California, San Diego since 2005. I received a PhD in Electrical Engineering and Computer Science from MIT, and my research centers around computer architecture but spans the stack from VLSI to compilers. I was lead architect of the 16-core MIT Raw tiled multicore processor, one of the earliest multicore processors, which was commercialized into the Tilera TILE64 architecture. Recently, in 2017, Intel Skylake SP has adopted our scalable mesh of cores architecture that we proposed. I co-authored the earliest published research on dark silicon, including a paper that derives the utilization wall that causes dark silicon, and a prototype massively specialized processor called GreenDroid. I also wrote a paper that establishes the definitive taxonomy, the Four Horsemen, for the semiconductor industry's approaches to dealing with the problem, and a follow-on paper on the Landscape of the Dark Silicon Design Regime. My research on dark silicon fed into the ITRS 2008 report that led Mike Mueller of ARM to coin the term "dark silicon". More recently, I wrote the first academic paper on Bitcoin mining chips.

In 2016, my team published the first paper on ASIC Clouds. We make the case that datacenters full of ASICs are in our near future, and show a prototypical ASIC Cloud architecture, how they should be designed, and how they save TCO. We proposed neural network ASIC Clouds before Google announced their TPU, and also proposed the use of video transcoding clouds for YouTube. If you read only one architecture paper this year, you should read the IEEE Micro 2017 Top Picks Issue ASIC Cloud Paper.

In 2017, we published the first architecture paper on NRE, non-recurring engineering expense. We show how minimizing NRE can be more important for ASIC Cloud feasibility than optimizing accelerator speedup or energy efficiency. We present the first ever architect's model for NRE, using current industry parameters (paper) (youtube talk), and opening up a new area of research. With the rise of specialization and the end of Moore's law, driving down the cost of design will surely be an important driver of future research.

I occasionally help companies and other legal professionals evaluate their patent portfolios, and provide advice to companies leveraging the Tilera TILE64 architecture. I have broad expertise in hardware and software, and on the Bitcoin cryptocurrency. My research is funded primarily by the National Science Foundation (NSF), including the Secure and Trustworthy Cyberspace Program, and DARPA/MARCO's C-FAR, part of STARnet.

Between the gaps at school, I worked on Apple's NuKernel microkernel, and co-wrote the first version of Connectix Virtual PC, an x86-to-PowerPC dynamic translation engine, which was acquired by Microsoft. I also contributed to the ChipWrights Visual Signal Processor in its earliest stages.

received the NSF CAREER Award in 2009 and tenure in 2012.