| Title | Validating VLSI Circuit Layout by Wirelist Comparison |
| Publication Type | Conference Paper |
| Year of Publication | 1983 |
| Authors | Ebeling C, Zajicek O |
| Conference Name | Proceedings of the IEEE International Conference on Computer Aided Design (ICCAD-83) |
| Pagination | 172–173 |
| Date or Month Published | September |
| Citation Key | Ebeling1983 |
