Luis Ceze
Assistant Professor
Department of Computer Science and Engineering
University of Washington
Box 352350
Seattle, WA 98195
Paul G. Allen Center, Room 540

(206) 543-1896 [phone], (206) 616-3804 [fax]
CSE590G Architecture Seminar (ongoing)
CSE599Q Topics in Multiprocessor Programmability, Spring 2008
CSE590P Programming Systems Seminar, Winter 2008 (with Dan Grossman)
CSE548 Computer Systems Architecture, Winter 2008
CSE378 Machine Organization & Assembly Language, Fall 2007
My research is in computer architecture, including programming models and compiler support that dovetail with new architectures.
Some recent publications (full list):
"Atom-Aid: Detecting and Surviving Atomicity Violations", (to appear) ISCA 2008.
"Recording and Deterministically Replaying Shared-Memory Multiprocessor Execution Efficiently", (to appear) ISCA 2008.
"SoftSig: Software-Exposed Hardware Signatures for Memory Disambiguation", (to appear) ASPLOS 2008.
"Concurrency Control with Data Coloring", (to appear) MSPC-ASPLOS 2008.
"BulkSC: Bulk Enforcement of Sequential Consistency", ISCA 2007.
"Implicit Parallelism with Ordered Transactions", PPoPP 2007.
"Colorama: Architectural Support for Data-Centric Synchronization", HPCA 2007.
"Scalable Cache Miss Handling for High Memory Level Parallelism ", MICRO 2006.
"Bulk Disambiguation of Speculative Threads in Multiprocessors ", ISCA 2006.
If you have a chance, take a look at SESC, a very fast multiprocessor simulator.
Now, here is a good way of choosing your next architecture or compiler conference.
I was born in São Paulo, Brazil.
I received my PhD in Computer Science from University of Illinois at Urbana-Champaign. I got my BEng and MEng in Electrical Engineering from University of São Paulo, Brazil. Here you can find my (outdated) resume (1-page version).
I am very fortunate to have such a happy family.
I am always happy because she
exists.