Luis Ceze
Assistant Professor

Department of Computer Science and Engineering
Microsoft Research Faculty Fellow
University of Washington
Box 352350
Seattle, WA 98195

Paul G. Allen Center, Room 576



(206) 543-1896 [phone], (206) 616-3804 [fax]

Our research group: sampa.

Teaching

CSE590G Architecture Seminar (ongoing)
CSE548 Computer Systems Architecture, Winter 2010
CSEP548 Computer Systems Architecture (PMP), Spring 2009
CSE378 Machine Organization & Assembly Language, Winter 2009
CSE599Q Topics in Multiprocessor Programmability, Spring 2008
CSE590P Programming Systems Seminar, Winter 2008 (with Dan Grossman)
CSE548 Computer Systems Architecture, Winter 2008
CSE378 Machine Organization & Assembly Language, Fall 2007

Research

Most of my research is in improving programmability and reliability of multiprocessor and multicore systems. It includes innovation in architecture, compilers, programming models and operating systems. I am the lead faculty in the sampa project.

Some recent selected publications (full list):

"CoreDet: A Compiler and Runtime System for Deterministic Multithreaded Execution", ASPLOS 2010 (to appear).
"Finding Concurrency Bugs with Context-Aware Communication Graphs", MICRO 2009 (to appear).
"The Bulk Multicore Architecture for Improved Programmability", CACM (to appear in Dec'09).
"The Case for System Support for Concurrency Exceptions", USENIX HotPar 2009.
"DMP: Deterministic Shared Memory Multiprocessing", ASPLOS 2009. Selected for the IEEE Micro Top Picks 2009.
"Self-Powered Processors", Wild and Crazy Ideas, ASPLOS 2009.
"Atom-Aid: Detecting and Surviving Atomicity Violations", ISCA 2008. Selected for the IEEE Micro Top Picks 2008.
"Recording and Deterministically Replaying Shared-Memory Multiprocessor Execution Efficiently", ISCA 2008. Selected for CACM Research Highlights 2009.
"SoftSig: Software-Exposed Hardware Signatures for Memory Disambiguation", ASPLOS 2008. Selected for the IEEE Micro Top Picks 2008.
"Concurrency Control with Data Coloring", MSPC-ASPLOS 2008.
"Bulk Operation and Data Coloring for Multiprocessor Programmability", Ph.D. Thesis.
"BulkSC: Bulk Enforcement of Sequential Consistency", ISCA 2007.
"Implicit Parallelism with Ordered Transactions", PPoPP 2007.
"Colorama: Architectural Support for Data-Centric Synchronization", HPCA 2007.
"Scalable Cache Miss Handling for High Memory Level Parallelism ", MICRO 2006.
"Bulk Disambiguation of Speculative Threads in Multiprocessors ", ISCA 2006.

If you need a good architecture simulator, take a look at SESC, a very fast multiprocessor simulator. And here is a good way of choosing your next architecture or compiler conference.

Students

I have the pleasure of working with the following incredible students:

Professional Activities

I have recently co-founded PetraVM together with my colleague Mark Oskin to commercialize technology initially developed at UW-CSE.

About me

I was born in São Paulo, Brazil.

I received my PhD in Computer Science from University of Illinois at Urbana-Champaign. I got my BEng and MEng in Electrical Engineering from University of São Paulo, Brazil.

Self portraits.

I love to cook and eat.

I am very fortunate to have such a happy family.

I am always happy because she exists.