CSE467-Lab 5

Purpose

You will apply what you've learned about Microblaze and EDK to configure a new peripheral to interface to the SRAM from Lab 3.

Documents

Here are some documents relating to this lab:

SRAM Datasheet
OPB External Memory Controller datasheet

Logic Analyzer tutorial (use signals on your Xilinx board for practice)

Part 1- Adding Microblaze SRAM Interface

  1. Begin by making a working copy of your project for Lab 4, Part 3.
  2. Study the OPB External Memory Controller Datasheet and the datasheet for your SRAM.
  3. Determine what mode, width and configuration of the OPB_EMC will work with your SRAM.
  4. Add the OPB peripheral, OPB_EMC to your design. Use the latest version, there are several.
  5. Merge the appropriate pin definitions in to you UDF file from the one that defines your SRAM interface in Lab 3.
  6. Connect the logic analyzer to your data, control, and some address lines. Don't re-enable the SRAM yet.
  7. Write a Microblaze routine to write data to the SRAM and read it back. Use the logic analyser to watch what is happening. When the operation looks correct, enable the SRAM.

Modify your routine to test the memory. Use the on-board LED to indicate results.

If you're having trouble with the configuration, here is a complete project with a 32-bit EMC interface configured for reference. Unzip it to a new directory. This is for different hardware and WON'T run on your board...

Demonstrate your test routine to a TA.

Part 2- Moved to lab 7


bruceh@cs